From:	sandmann AT clio DOT rice DOT edu (Charles Sandmann)
Message-Id:	<10303101708.AA15173@clio.rice.edu>
Subject:	Re: Win2K/XP uclock() - using rdtsc
To:	djgpp-workers AT delorie DOT com
Date:	Mon, 10 Mar 2003 11:08:28 -0600 (CST)
In-Reply-To:	<3E6C51A0.AD982E2C@phekda.freeserve.co.uk> from "Richard Dawe" at Mar 10, 2003 08:49:36 AM
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> > When the bios tic counter is set varies widely.  I had the process busy
> > waiting on the bios counter, then checking rdtsc.  For example, each tic
> > took between 4.5 Million amd 117 Million cycles on my machine (in a test
> > of 1000 ticks).  It missed 10 tics in that time frame (elapsed was 1010
> > tics).  A normal cycle on this machine should take 24.7 Million tics.
> 
> I take it this was on the 450MHz test machine. 

Yes.

> Does the 60MHz machine behave the same, or does it drop more BIOS tic 
> counter updates? Basically: is the error larger on slower machines?

Since the 60Mhz machine is running Windows 98, which is more regular in
it's setting of the BIOS tic counter - it's hard for me to say.  The 
worst case error I saw under the 60Mhz box under W98 was 2%.

I wrote a program which just ran the calibration loop for a chosen
number of calibration tics, then ran it 1000 times for each number.
I saved the average, max negative error, max positive error, 
standard deviation.  Made pretty plots in Excel.

I found the error tails are not a normal distribution - but are 
fairly close (2% of values are +- 4 standard deviations, 0.2% of
values are +- 6 standard deviations).  What this means is there 
are more "gross errors" than would be expected.

I currently don't have anything slower than 200Mhz running Windows NT/2K
that I can easily test.

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