Mail Archives: djgpp-workers/2003/03/10/05:23:49
Hello.
Charles Sandmann wrote:
>
> I played with this a bit. I found out that:
>
> When the bios tic counter is set varies widely. I had the process busy
> waiting on the bios counter, then checking rdtsc. For example, each tic
> took between 4.5 Million amd 117 Million cycles on my machine (in a test
> of 1000 ticks). It missed 10 tics in that time frame (elapsed was 1010
> tics). A normal cycle on this machine should take 24.7 Million tics.
I take it this was on the 450MHz test machine. Does the 60MHz machine behave
the same, or does it drop more BIOS tic counter updates? Basically: is the
error larger on slower machines?
[snip]
> So my question is - how accurate should we try and be?
[snip]
> Comments? How about a 2% target, with roughly a 1/2 second calibration?
> Too long?
[snip]
Given that uclock is supposed to be a high-resolution timer, I think that
would be OK.
Having said that, we claim "less than one microsecond accuracy" on the info
page. So a 5% error probably isn't too bad: 840 ns * 1.02 = 856.8 ns; 840 ns *
1.05 = 882 ns.
Bye, Rich =]
--
Richard Dawe [ http://www.phekda.freeserve.co.uk/richdawe/ ]
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