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Date: | Thu, 25 Mar 2004 09:51:42 -0800 (PST) |
From: | Joshuah Goldstein <mrbiglesworth3 AT yahoo DOT com> |
Subject: | Re: DMA question |
To: | djgpp AT delorie DOT com |
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I think it means your intel cpu is in a certain addressing mode, where paging isnt used and the program can be cognizant of actual physical memory addresses. But, I could be wrong. --- Anthony <akantsel AT integra DOT rmt DOT ru> wrote: > Hello, > The program from message > http://www.delorie.com/djgpp/mail-archives/djgpp/1995/12/13/17:04:41 > Generates the following output: > > Entry point = 20B:CF > XMS vesion = 3.0 > Handle of 2048k block = D5B6 > Locked 2048k block at physical location 001B1400 > Linear address = 001B1400, physical address = 001B1400 > Writing to memory area > Verifying memory area > Unlocked 2048k block > Freed 2048k block > > Is it normal that Linear address == physical address? > Where can I find any discription of interrupts used in > this program? > One more question: is it 'good style' to post a link to > text of program or I > should put the text in message body? > Thanks > Anthony > > > __________________________________ Do you Yahoo!? Yahoo! Finance Tax Center - File online. File on time. http://taxes.yahoo.com/filing.html
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