From:	"H.Shiozaki" <hshiozaki AT nifty DOT com>
Newsgroups:	comp.os.msdos.djgpp
Subject:	Help about Interrupt Handler for RTC
Date:	Sun, 1 Sep 2002 02:48:19 +0900
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To:	djgpp AT delorie DOT com
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I got a sample program from 
http://www.delorie.com/djgpp/doc/ug/interrupts/overview.html
Title: Guide: Interrupts Overview , Written by Mr. Peter Marinov
I test it in DJGPP(V204) + GCC3.1 + Win98(DOS-BOX) and work OK.

I modified it, for RTC_Handler from Timer_Handler.
Please someone help me.
Attached IRQ8smp4.c file is can be compiled 
with no error, but not work.
Please someone help me.
I'm sorry for my bad English.
----
Regard
H.Shiozaki


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/* irq8smp4.c : basecally got from
  http://www.delorie.com/djgpp/doc/ug/interrupts/overview.html
  Title is Guide: Interrupts Overview, Written by Peter Marinov:
  changed from TIMER_IRQ_0 to RTC_IRQ_8 by me
*/

//Simple Example of chaining interrupt handlers
//Adopted from Matthew Mastracci's code

#include <stdio.h>
#include <pc.h>
#include <dpmi.h>
#include <go32.h>

void    RTC_Handler(void);
int     main(void);
void    set_rtc(void);
void    restore_rtc(void);
void            write_rtc(unsigned char reg_n, unsigned char val);
unsigned char   read_rtc(unsigned char reg_n);

//macros by Shawn Hargreaves from the Allegro library for locking
//functions and variables.
#define LOCK_VARIABLE(x)    _go32_dpmi_lock_data((void =
*)&x,(long)sizeof(x));
#define LOCK_FUNCTION(x)    _go32_dpmi_lock_code(x,(long)sizeof(x));

#define INT_RTC     0x70    /* IRQ_8 INT # */
#define PICM_ISR    0x20    /* PIC_Master OCW2 */
#define PICM_IMR    0x21    /* OCW1 */
#define PICS_ISR    0xA0    /* PIC_Slave OCW2 */
#define PICS_IMR    0xA1    /* OCW1 */

#define RTC_REG_A   0x0A    /* OSC and define SQW Frequency */
#define RTC_REG_B   0x0B    /* INTerrupt and Operation Mode */
#define RTC_REG_C   0x0C    /* Interrupt Flags, cleared by read REG_C */
#define RTC_REG_D   0x0D    /* RTC Battery check (bit7=3D1:Ok)*/
#define RTC_8192Hz  0x23    /* REG_A: frequency Max.        */
#define RTC_1024Hz  0x26    /* REG_A: frequency Default PC  */
#define RTC_0128Hz  0x29    /* REG_A: frequency 128Hz       */
#define RTC_0002Hz  0x2F    /* REG_A: frequency Min.        */
#define RTC_PIE_SQW_MODE    0x4A =20
/* REG_B: Periodic Interrupt Enable and Square Wave Generator Enable =
MODE */

int counter =3D 0;            /* irq8 counter */
unsigned char rtc_reg_a;
unsigned char rtc_reg_b;    /* not used , currently */
// unsigned char imr_slave;

void RTC_Handler(void)
 {
 counter++;
// MUST NEED "read REG_C" to use this interrupt continuiusely=20
 outportb(0x70, RTC_REG_C); /* set reg_pointer REG_C */
 inportb(0x71);             /* clear REG_C by read it */
// this is need because NOT redirect to oldhandler_irq8
 outportb(PICS_ISR, 0x20);  /* EOI to PIC_Slave,  non specific to irq0 =
*/
 outportb(PICM_ISR, 0x20);  /* EOI to PIC_Master, non specific to irq2 =
*/
//asm ("sti");   /* need or not ?? */
 }

int main(void)
 {
 set_rtc();     /* intialize RTC: REG_B */

 //structures to hold selector:offset info for the ISRs
 _go32_dpmi_seginfo OldISR, NewISR;

// printf("About to chain the new ISR onto the old timer ISR..\n");
 printf("Type any Key to proceed, and type again any key to stop.\n");
 getkey();

 //lock the functions and variables, ie. aboid swapout */
 LOCK_FUNCTION(RTC_Handler);
 LOCK_VARIABLE(counter);

 //load the address of the old timer ISR into the OldISR structure
 _go32_dpmi_get_protected_mode_interrupt_vector(INT_RTC, &OldISR);

 //point NewISR to the proper selector:offset for handler function
 NewISR.pm_offset =3D (int)RTC_Handler;
 NewISR.pm_selector =3D _go32_my_cs();

 //chain the new ISR onto the old one so that first the old timer ISR
 //will be called, then the new timer ISR
 //  _go32_dpmi_chain_protected_mode_interrupt_vector(INT_RTC,&NewISR);
 /**** changed to no redirected ****/

 //notice no changes to counter in this main_loop, the interrupt changes =
it
 while (!kbhit())
   printf("%d\n",counter);

 printf("Removing new ISR from the timer ISR chain\n");
 //load the old timer ISR back without the new ISR chained on
 _go32_dpmi_set_protected_mode_interrupt_vector(INT_RTC, &OldISR);

 restore_rtc();  /* restore RTC: REG_B */
 return 0;
}
//////////////////////////////////////////////////////
void    set_rtc(void)
{
    rtc_reg_a =3D read_rtc(RTC_REG_A);    /* save cuurent mode */
    rtc_reg_b =3D read_rtc(RTC_REG_B);   =20
   =20
//  write_rtc(RTC_REG_A, RTC_1024Hz); /* 0x26: frequency=3D1024Hz(PC =
Default)*/

    write_rtc(RTC_REG_B, RTC_PIE_SQW_MODE); /* 0x4A: 0100 1010, PIE=3DOn =
*/

//  printf("set_rtc: REG_A: current=3D%02Xh, new=3D%02Xh.\n", rtc_reg_a, =
RTC_1024Hz);
    printf("set_rtc: REG_B: current=3D%02Xh, new=3D%02Xh.\n",=20
        rtc_reg_b, RTC_PIE_SQW_MODE);
//  printf("set_rtc: RTC frequency=3D%d[Hz]\n", 1<<(16-f));
}

void    restore_rtc(void)
{
//  write_rtc(RTC_REG_A, rtc_reg_a);
    write_rtc(RTC_REG_B, rtc_reg_b);
    read_rtc(RTC_REG_C);            /* Clear REG_C by Read REG_C */
}

void    write_rtc(unsigned char reg_n, unsigned char val)
{
    outportb(0x70, reg_n);  /* set reg_pointer */
    outportb(0x71, val);    /* write val to that register */
}
unsigned char   read_rtc(unsigned char reg_n)
{
    unsigned char rd;
    outportb(0x70, reg_n);  /* set reg_pointer */
    rd =3D inportb(0x71);     /* read from that register */
    return(rd);
}
=1A
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