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Date:	Sat, 26 Jan 2002 15:12:01 +0200
From:	"Eli Zaretskii" <eliz AT is DOT elta DOT co DOT il>
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To:	kala AT sankya DOT com (Babu Kalakrishnan)
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In-reply-to:	<slrna5524i.43o.kala@ganga.sankya.com>
Subject:	Re: DPMI Interrupt latency ?
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> From: kala AT sankya DOT com (Babu Kalakrishnan)
> Newsgroups: comp.os.msdos.djgpp
> Date: Sat, 26 Jan 2002 16:14:34 +0530
> 
> Could anyone tell me what is the order of delay (in clocks) required for
> the CWSDPMI server to reflect a hardware interrupt from Real mode to the
> protected mode handler ?

You can find some information about this in the DJGPP FAQ, sections
18.9 and 18.11.

> Any suggestion regarding which DPMI server would provide me
> the best latency figures would also be welcome.

Section 18.11 in the FAQ has some suggestions or minimizing the mode
switches.

> Would it be possible
> to hack the DPMI server source code so that real mode handler can access
> memory above 1MB using 32 bit pointers ?

I don't think so: in real mode, only 20 bits of the address are put
on the bus.  While you could do what you want in V86 mode, I doubt
that you'd want to, since V86 mode increases the latency that you
want to minimize.

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