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From: | sandmann AT clio DOT rice DOT edu (Charles Sandmann) |
Message-Id: | <10105261727.AA13828@clio.rice.edu> |
Subject: | Re: SRAM chip access problem |
To: | eliz AT is DOT elta DOT co DOT il |
Date: | Sat, 26 May 2001 12:27:33 -0500 (CDT) |
Cc: | alex AT compuweigh DOT com (Alex Oleynikov), djgpp AT delorie DOT com |
In-Reply-To: | <2593-Sat26May2001100124+0300-eliz@is.elta.co.il> from "Eli Zaretskii" at May 26, 2001 10:01:24 AM |
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Reply-To: | djgpp AT delorie DOT com |
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> > (BTW, how do you know whether it is code or data segment just by looking at > > the selector's value? Isn't this information available only from the > > descriptor to which this selector points in the LDT?). > > The selector itself (c7) looked to me like a code selector. Charles, > did I miss something? You can't tell the selector information from the number, only it's ring-protection status. You would have to use LAR to get the code/data status. Selectors in DJGPP are 7/f/7/f alternating returned end nibble values when the DPMI provider returns them sequentially. The low 2 bits show requested priv, the next bit (0x4) ldt/gdt status.
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