Date:	Tue, 11 Apr 2000 13:25:06 +0200 (IST)
From:	Eli Zaretskii <eliz AT is DOT elta DOT co DOT il>
X-Sender:	eliz AT is
To:	"Alexei A. Frounze" <alex DOT fru AT mtu-net DOT ru>
cc:	djgpp AT delorie DOT com
Subject:	Re: Processor Exceptions
In-Reply-To:	<38F22AC6.ECCC858D@mtu-net.ru>
Message-ID:	<Pine.SUN.3.91.1000411132441.4929I-100000@is>
MIME-Version:	1.0
Reply-To:	djgpp AT delorie DOT com
Errors-To:	nobody AT delorie DOT com
X-Mailing-List:	djgpp AT delorie DOT com
X-Unsubscribes-To:	listserv AT delorie DOT com

On Mon, 10 Apr 2000, Alexei A. Frounze wrote:

> 1. You prepare N separate tasks/threads by allocating separate stack for each
> task/thread.
> 
> 2. You push initial values of (E)FLAGS, CS:(E)IP and other registers to their
> stacks.
> 
> 3. You load SS:(E)SP with one of those stacks. Pop registers back and perform an
> IRET(D). Hence you do 1st task/thread switching.
> 
> 4. When becoms time of another task switch (timer IRQ is generated), you push
> the rest of the registers (except of (E)FLAGS and CS:(E)IP, since they are
> already on stack). Then you load another SS:(E)SP pair, pop regs and perform
> IRET(D) once more. Thus you get 2nd,3rd,... Nth task switch.

The problem with this approach is that it switches stacks (from the
stack of one thread to the stack of another) inside a hardware
interrupt handler.  And the DPMI spec explicitly forbids doing that
(because the DPMI server itself switches stacks when it processes the
interrupt).  So this will not work in DJGPP.  You might get it to work
with some specific DPMI host, given some heavy tinkering, but it will
then be non-portable to other DPMI environments.

- Raw text -