Mail Archives: djgpp/2000/03/16/10:32:37
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Hi,
Thanks for your answer.
> One thing you could try is to redirect the ADC board to one of the
> IRQs in the slave PIC which is below the IRQ used for the DSP. This
> would take care of the priority issue automatically.
>
>
Could you tell me how to do that? My on board jumper allows me to set
the interrupt
from 2 to 7.
> > The code of the DSP interrupt is quite long.
>
> This is not a good thing. Can't you restructure your code so that
> most of it doesn't run inside the interrupt handler?
>
The code itself is not very long but I have to transfert data between my
DPRAM of
the DSP and the PC RAM.
In fact the problen was due cause I didn't know I need to add a
enable() at the
beginning of my DSP interrupt to allows new incomming interrupts .
Now it works correctly, but I'm going to take care of your advices.
I think I'm going to test the special mask instead of changing priority.
Thank you
Fred Cazenave
--
_________________________________________________________
| |
| Frederic CAZENAVE |
| _/\_ /^= McGill Radar |
| \_/ \// Box 198, MacDonald College |
| | /-\ | Ste Anne de Bellevue |
| || || Quebec, Canada H9X 3V9 |
| Tel (514) 398 7733 fax (514) 398 7755 |
| mailto:Frederic DOT Cazenave AT hmg DOT inpg DOT fr |
| http://www.mpl.orstom.fr/hydrologie/catch/ |
|__________________________________________________________|
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Hi,
<P>Thanks for your answer.
<BR>
<BLOCKQUOTE TYPE=CITE>
<PRE>One thing you could try is to redirect the ADC board to one of the
IRQs in the slave PIC which is below the IRQ used for the DSP. This
would take care of the priority issue automatically.
</PRE>
</BLOCKQUOTE>
<P><BR>Could you tell me how to do that? My on board jumper allows
me to set the interrupt
<BR>from 2 to 7.
<BLOCKQUOTE TYPE=CITE>
<PRE>> The code of the DSP interrupt is quite long.
This is not a good thing. Can't you restructure your code so that
most of it doesn't run inside the interrupt handler?</PRE>
</BLOCKQUOTE>
<P><BR>The code itself is not very long but I have to transfert data between
my DPRAM of
<BR>the DSP and the PC RAM.
<P>In fact the problen was due cause I didn't know I need to add a enable()
at the
<BR>beginning of my DSP interrupt to allows new incomming interrupts .
<BR>Now it works correctly, but I'm going to take care of your advices.
<BR>I think I'm going to test the special mask instead of changing priority.
<P>Thank you
<P>Fred Cazenave
<PRE>--
_________________________________________________________
| |
| Frederic CAZENAVE |
| _/\_ /^= McGill Radar |
| \_/ \// Box 198, MacDonald College |
| | /-\ | Ste Anne de Bellevue |
| || || Quebec, Canada H9X 3V9 |
| Tel (514) 398 7733 fax (514) 398 7755 |
| <A HREF="mailto:Frederic DOT Cazenave AT hmg DOT inpg DOT fr">mailto:Frederic DOT Cazenave AT hmg DOT inpg DOT fr</A> |
| <A HREF="http://www.mpl.orstom.fr/hydrologie/catch/">http://www.mpl.orstom.fr/hydrologie/catch/</A> |
|__________________________________________________________|</PRE>
</HTML>
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