Mail Archives: djgpp/1997/10/22/08:17:50
Oon Lin (sci-okl AT jcu DOT edu DOT au) wrote:
: On Fri, 17 Oct 1997, tom burgess wrote:
: > good AT soback DOT kornet DOT nm DOT kr wrote:
: > >
: > > I have a question in DJGPP inline assembly.
: > > Among MOVW %AX, %BX, MOVL %EAX, %EBX
: > >
: > > This is just about speed, not others.
: > >
: > > Thanks in advance.
: >
: > On 386 and 486, same speed. On Pentium, 16 bit operations (MOVW) are
: > SLOWER. (1 cycle prefix byte penalty, plus additional penalties
: > because instruction pairing is disabled)
: >
: > regards, tom
: Hi !
: I was browsing through the news group when I came across the above reply..
: I'm kinda confused (Hope you can give me some simple explanations...)
: I had read somewhere in a computer architecture book that a word would
: correspond to the size of the register in a CPU. Since the register size
: on a Pentium is 32-bit , wouldn't MOVW be doing a 32-bit operation ?
movw does a 16-bit move, "w" in x86 architecture is used for 16 bits cause
of historic reasons (x86 architecture started as 16-bit).
: Or maybe I had confused myself on the actual implementation (assembly) and
: architecture ?
His answer confused you totally! Before all, I have to say that on
386/486/Pentium in 32-bit protected mode movw is slower than movl cause of
the prefix byte (so, not just on pentiums as Tom said). It is true that
slowdown on pentiums is even more, cause of the instruction pairing. But
even 386 and 486 suffer from it cause of that prefix byte!
Conclusion would be, to avoid 16-bit operations (short in C). I've noticed
that even replacing int type variables to be char type, makes a little speed
up (at least on 486), when not using them as indexes of arrays. In this case
speedup comes cause the compiler has more (parts of ) registers available
for it's own use.
--
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