Mail Archives: djgpp/1997/06/15/23:17:57
In article <Pine DOT D-G DOT 3 DOT 91 DOT 970606090636 DOT 12912A-100000 AT dg1>, "Art S.
Kagel" <kagel AT ns1 DOT bloomberg DOT com> scribbled :
>On 4 Jun 1997, Paul Derbyshire wrote:
>
>>
>> Josef Moellers (mollers DOT pad AT sni DOT de) writes:
>> > I beg to differ.
>> > It's the processor hardware that determines the endianness. The OS has
>> > to live with it or ... die.
>>
>> As long as the CPU isn't bytesexual, yep.
>>
>> > There are CPUs that can be both, e.g. the MIPS CPUs can switch between
>> > big endian and little endian mode.
>>
>> Those are called "bytesexual". There're a few like that. Not all Unices
>> run on bytesexual machines. (In fact a unix of some kind or other can be
>Actually I've been told be people who should know that the Pentium and
>Pentium Pros have an Endian switch just like the MIPS processors, though
>I do not know of anyone who is using it. Indeed at Bloomberg we have
>much BigEnd dependent code (legacy from old Perkin-Elmer CPUs which
>survived well on Data General's M88110 Aviion systems). We must now move
>to an Intel platform and DG has produced compilers and OS drivers to
>support our code WITHOUT switching the CPU to BigEndian mode as they are
>not willing to port DGUX/Intel to the Pentium in BigEndian mode. So it
>IS possible to run BigEndian on a Little Endian machine. So far the only
>performance problems not yet licked involve floating point data and DG
>has just started working on that.
Another example is the ARM 610, as used in the RiscPC - this can be big
or little endian.
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