Mail Archives: djgpp/1997/03/17/04:44:40
In article <Pine DOT SGI DOT 3 DOT 91 DOT 970312105224 DOT 12306B-100000 AT atmosp DOT physics DOT utor
onto.ca>, Peter Berdeklis <peter AT atmosp DOT physics DOT utoronto DOT ca> writes
>On 10 Mar 1997, Paul Derbyshire wrote:
>> Peter Berdeklis (peter AT atmosp DOT physics DOT utoronto DOT ca) writes:
>> > If these extensions to C are written they would likely be written in hand
>> > coded/massaged inline asm. In that case the compiler doesn't need to know
>> > anything about packing and parallel op's, just which registers are
>> > invalid (eg. the whole FPU stack).
>>
>> In other words, the minimal MMX support would be just to add to inline asm
>> the ability to specify "%MMX" as one of The Clobbered to mean the FPU
>> registers.
>
>gcc's extended asm already has "f" as the specification for an FPU
>register ("t" and "u" are for the top and second register of the FPU
>stack). Since "f" does not specify an FPU register, I would assume that
>putting it in the clobberred list would invalidate assumptions about any
>FPU register. If this is the case, then the ability to provide minimal
>support for the MMX already exists.
You really need to support marking the cost of a MMX <-> FPU context
switch ( 70 clocks! last time I heard it), make sure the compiler makes
no state changes to the fpu and makes no use of FPU registers *between*
MMX macro calls not just across them.
---
Paul Shirley: shuffle chocolat before foobar for my real email address
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