X-Recipient:	archive-cygwin AT delorie DOT com
DomainKey-Signature:	a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id
	:list-unsubscribe:list-subscribe:list-archive:list-post
	:list-help:sender:date:content-transfer-encoding:mime-version
	:content-type:message-id:to:from:subject; q=dns; s=default; b=oz
	i4jq/qUQPUv3/voeB4jNzlzJe3DWKTCZSMDw4pltY3QA4QkbsMdHeg52wwwi5sN6
	IXf14XJsrldXP5oVDOcTWjiJliCOBkUCpqyT3m+aV5978AzpHHHbMO2A3yaVjXqP
	k6kljt198RNBL/JVNDO5tYnRrnwNHwk/pNmtX+5RE=
DKIM-Signature:	v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id
	:list-unsubscribe:list-subscribe:list-archive:list-post
	:list-help:sender:date:content-transfer-encoding:mime-version
	:content-type:message-id:to:from:subject; s=default; bh=AOK6Yl0K
	x6xn5L7U9MFEcy54Uac=; b=Pkhb+XpiD3+MvAcKFmLURH573nEzXpkodI36Rqyj
	wLPrtpa6tNmJdeCXh/7n6zmVynL/JOx9n0lvQbA8NrJNP/FLL4KKqBV0Ufz4xrbM
	S7kHDl28nunPoNkiosTLun+56CyZyK5O3GMwOJRXI+f8GwVCX5yOFs3WP6YZJRxQ
	xsA=
Mailing-List:	contact cygwin-help AT cygwin DOT com; run by ezmlm
List-Id:	<cygwin.cygwin.com>
List-Subscribe:	<mailto:cygwin-subscribe AT cygwin DOT com>
List-Archive:	<http://sourceware.org/ml/cygwin/>
List-Post:	<mailto:cygwin AT cygwin DOT com>
List-Help:	<mailto:cygwin-help AT cygwin DOT com>, <http://sourceware.org/ml/#faqs>
Sender:	cygwin-owner AT cygwin DOT com
Mail-Followup-To:	cygwin AT cygwin DOT com
Delivered-To:	mailing list cygwin AT cygwin DOT com
Authentication-Results:	sourceware.org; auth=none
X-Virus-Found:	No
X-Spam-SWARE-Status:	No, score=1.8 required=5.0 tests=BAYES_50,RCVD_IN_DNSWL_NONE,RP_MATCHES_RCVD,SPF_HELO_PASS,SPF_PASS,URIBL_GREY autolearn=no version=3.3.2 spammy=helped, Back, professionals, videos
X-HELO:	smtp-coi-wf-confirmed-01-217.aweber.com
Date:	Fri, 13 Oct 2017 09:46:40 -0400
MIME-Version:	1.0
X-Loop:	awlist3810424 AT aweber DOT com
X_Id:	3810424:1:cygwin AT cygwin DOT com
Message-ID:	<37.25.30202.0C3C0E95@momentum1-mta1>
X-AWMessage:	5d9b2342-793c-4b3a-b60d-360160077270
Feedback-ID:	A944546:L3810424:M23844895:AWeber
X-Subscribe-Method:	import
To:	cygwin AT cygwin DOT com
From:	"Kunal Ghosh" <contactvsd AT vlsisystemdesign DOT com>
X-Subscription:	Subscribed on 10/13/2017, via import
Subject:	Welcome to my community at VLSI SYSTEM DESIGN!!
X-MIME-Autoconverted:	from quoted-printable to 8bit by delorie.com id v9DDmq9Y011451

Hi
My name is Kunal Ghosh, I am a growth hacker and co-founder at VLSI SYSTEM DESIGN (VSD)

As a 'Growth Hacker', I intend to help students/professionals build their profile even stronger in semiconductors and VLSI, by creating courses at every possible domain in Back end. The experiments which I perform in VSD courses using open-source EDA tools, are of similar complexity of current chip design industry. Till date I have nurtured
around 10000+ students and professionals through videos and many of them have been placed or moved to leading semiconductor industries. I have been doing this part time for past 7 years, and now doing this full time
 at VSD. Happy Learning!!

Here's the link to all my ebooks released till now..Download them for FREE

Tri-state buffer characterization:
http://clicks.aweber.com/y/ct/?l=GkX7H&m=3yR80EZOX3A8._6&b=C9cRj8gfkrikrje73qvO7Q

On-chip Variation:
http://clicks.aweber.com/y/ct/?l=GkX7H&m=3yR80EZOX3A8._6&b=f32UC63xFZ8GY8YqTFjX3w

Channel connected component (CCC):
http://clicks.aweber.com/y/ct/?l=GkX7H&m=3yR80EZOX3A8._6&b=r8TiWZTFOrgob_wVKSls8Q

Maze Routing:
http://clicks.aweber.com/y/ct/?l=GkX7H&m=3yR80EZOX3A8._6&b=LwluKnRhTB_ubwwEKDLo2A

Regular buffer v/s clock buffer:
http://clicks.aweber.com/y/ct/?l=GkX7H&m=3yR80EZOX3A8._6&b=S2z1bApHsh.kVKBg5O6eqQ

Few more static power:
http://clicks.aweber.com/y/ct/?l=GkX7H&m=3yR80EZOX3A8._6&b=WbrjInZeIMnOmAOMyFVxig

Propagated noise:
http://clicks.aweber.com/y/ct/?l=GkX7H&m=3yR80EZOX3A8._6&b=t10Z38gO6aZOH3Sb1xQHuA

CPPR:
http://clicks.aweber.com/y/ct/?l=GkX7H&m=3yR80EZOX3A8._6&b=n_qcjCEPgIca4Kwrh4_qsg

Industrial Physical design flow (my IITB college notes which helped me get into my first job)
http://clicks.aweber.com/y/ct/?l=GkX7H&m=3yR80EZOX3A8._6&b=50O18eoI9jtQa2Qj.Z83OA

Clock gating analysis:
http://clicks.aweber.com/y/ct/?l=GkX7H&m=3yR80EZOX3A8._6&b=UqIMlPaJKIJBIgt7AXvD3g

SPEF parasitic format explained in detail:
http://clicks.aweber.com/y/ct/?l=GkX7H&m=3yR80EZOX3A8._6&b=ijhHdA_qSdQX_h.EZAWENg


Now, to be really successful in the field of VLSI and Semiconductors, you need to take the courses in below order:
1) VSD - Physical design flow
2) VSD - Clock tree synthesis - Part 1 & 2
3) VSD - Signal Integrity
4) VSD - Static timing analysis - Part 1 & 2 (Can be taken in between)
5) VSD - Circuit design and SPICE simulations Part 1 & Part 2
(This is the core of VLSI, so you can take it in beginning or end)
6) VLSI - Essential concepts and detailed interview guide (This course is a glimpse of all above courses, but for details of each topic, you need to take course 1) to 5).)
7) VSD - Custom Layout (Can be taken in between)

Connect with me for more guidance:
Hope you enjoy the session best of luck for future !!

Outer Ring Road
Bangalore
Bangalore Karnataka 560037
INDIA

To unsubscribe or change subscriber options visit:
http://www.aweber.com/z/r/?zByMDCxMLLRsbGxsTAxMLLRmtEzMHCwsHJys

--
Problem reports:       http://cygwin.com/problems.html
FAQ:                   http://cygwin.com/faq/
Documentation:         http://cygwin.com/docs.html
Unsubscribe info:      http://cygwin.com/ml/#unsubscribe-simple

- Raw text -