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Mail Archives: cygwin/2003/05/14/17:46:54

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Message-Id: <200305142129.h4ELTam16402@proradius03>
From: Arnd Riebartsch <arnd AT arieba DOT net>
To: cygwin AT sources DOT redhat DOT com
Reply-To: arnd AT arieba DOT net
Subject: Digital Design with ModelSim, Verilog, VHDL
Date: Wed, 14 May 2003 16:47:19 -0500
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Hello,
Modelsim is a great simulation-tool for programming of VLSI =
Asic's/FPGA's/CPLD's/SoC's.
Since I was involved heavily with the use of ModelSim, I recently created a =
manual, which can be used especially for self-study purposes.
I would be glad, if someone could forward my link =
(http://www.arieba.net/simulators.htm#ModelSim) to
potential interests.
Nevertheless I am also interested in open positions in Design/Verification =
and/or AE positions !

Best Regards
Arnd Riebartsch
Phone: 469-583-2558
P.S.:
Resume:  http://www.cv.arieba.net  

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