delorie.com/archives/browse.cgi   search  
Mail Archives: cygwin/2003/05/14/17:44:30

Mailing-List: contact cygwin-help AT cygwin DOT com; run by ezmlm
List-Subscribe: <mailto:cygwin-subscribe AT cygwin DOT com>
List-Archive: <http://sources.redhat.com/ml/cygwin/>
List-Post: <mailto:cygwin AT cygwin DOT com>
List-Help: <mailto:cygwin-help AT cygwin DOT com>, <http://sources.redhat.com/ml/#faqs>
Sender: cygwin-owner AT cygwin DOT com
Mail-Followup-To: cygwin AT cygwin DOT com
Delivered-To: mailing list cygwin AT cygwin DOT com
Message-Id: <200305142128.h4ELSgm15444@proradius03>
From: Arnd Riebartsch <arnd AT arieba DOT net>
To: cygwin AT cygwin DOT com
Reply-To: arnd AT arieba DOT net
Subject: Digital Design with ModelSim, Verilog, VHDL
Date: Wed, 14 May 2003 16:46:33 -0500
MIME-Version: 1.0

--0f7edfbc-16ca-45bd-8cf4-31c67514ff75
Content-Type: text/plain; charset=iso-8859-1
Content-Transfer-Encoding: quoted-printable

Hello,
Modelsim is a great simulation-tool for programming of VLSI =
Asic's/FPGA's/CPLD's/SoC's.
Since I was involved heavily with the use of ModelSim, I recently created a =
manual, which can be used especially for self-study purposes.
I would be glad, if someone could forward my link =
(http://www.arieba.net/simulators.htm#ModelSim) to
potential interests.
Nevertheless I am also interested in open positions in Design/Verification =
and/or AE positions !

Best Regards
Arnd Riebartsch
Phone: 469-583-2558
P.S.:
Resume:  http://www.cv.arieba.net  

--0f7edfbc-16ca-45bd-8cf4-31c67514ff75
Content-Type: text/plain; charset=us-ascii

--
Unsubscribe info:      http://cygwin.com/ml/#unsubscribe-simple
Problem reports:       http://cygwin.com/problems.html
Documentation:         http://cygwin.com/docs.html
FAQ:                   http://cygwin.com/faq/
--0f7edfbc-16ca-45bd-8cf4-31c67514ff75--

- Raw text -


  webmaster     delorie software   privacy  
  Copyright © 2019   by DJ Delorie     Updated Jul 2019