Bitfields for AMD-640 DRAM Control Register 1:
Bit(s)	Description	)
 7-6	page mode control
	00 close page after access
	01 reserved
	10 keep page open until timeout or page miss
	11 close page if processor has not accessed DRAM for 8 CPU cycles
 5	enable fast DRAM decoding
 4	reduce EDO DRAM leadoff cycle from 6T to 5T
 3	delay DRAM data latch by 1/2 clock
 2	(AMD-640) reserved
	(VT82C580VPX) Pin88 function (0 = DB32, 1 = TA9)
 1	reserved (0)
 0	delay DRAM read cycle by 1T whenever write buffer contains data
	must be set if read-around-write is enabled (see #00987)
SeeAlso: #00983,#00997,#00982