Bitfields for AMD-645 PM GP Timer Control register:
Bit(s)	Description	)
 31-30	power-conservation mode timer
	00 = 1/16 sec
	01 = 1/8 sec
	10 = 1 sec
	11 = 1 minute
 29	(read) set when system is in power-conservation mode
 28	enable power-conservation mode
 27-26	secondary event timer
	00 = 2 msec
	01 = 64 msec
	10 = 1/2 sec
	11 = 0.25 msec after EOI
 25	secondary event occurred, secondary event timer is counting down
 24	enable secondary event timer
 23-16	GP1 Timer count (see bits 5-4)
 15-8	GP0 Timer count (see bits 1-0)
 7	start GP1 timer
 6	automatically reload GP1 timer after counting down to 0
 5-4	time base for GP1 timer
	00 disabled
	01 = 32 microseconds
	10 = 1 second
	11 = 1 minute
 3	start GP0 timer
 2	automatically reload GP0 timer after counting down to 0
 1-0	time base for GP0 timer
	00 disabled
	01 = 1/16 second
	10 = 1 second
	11 = 1 minute
SeeAlso: #01049