Bitfields for AMD-645 ISA Clock Control register:
Bit(s)	Description	)
 7	disable "Latch IO16#"
 6-4	reserved (0)
 3	enable ISA Bus clock select via bits 2-0 (=0 use PCLK/4)
 2-0	ISA Bus clock select
	000 PCLK/3 (default)
	001 PCLK/2
	010 PCLK/4
	011 PCLK/6
	100 PCLK/5
	101 PCLK/10
	110 PCLK/12
	111 OSC/2
Note:	in order to safely change the ISA clock, bit 3 must first be cleared,
	  then bits 2-0 may be changed, and finally bit 3 can be set again
SeeAlso: #01011,#01013