Bitfields for AMD-640 DRAM Drive Strength Control register:
Bit(s)	Description	)
 7	bank decoding test (1="for production test only. DO NOT SET.")
 6	strength of MA[1:0] drive (0 = 12ma, 1 = 24ma)
 5	function of N17 and M17 pins
	0 N17 is RAS5#, M17 is RAS4#
	1 N17 is MA1, M17 is MA0
 4	force SMM mode (when set, act as if SMIACT# is asserted)
 3	strength of SDRAM command lines (0 = 12ma, 1 = 24ma)
 2	strength of MA[13:2] and WEx# drive (0 = 12ma, 1 = 24ma)
 1	strength of CAS# drive (0 = 12ma, 1 = 24ma)
 0	strength of RAS# drive (0 = 12ma, 1 = 24ma)
SeeAlso: #00983,#00999