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Subject: Re: [geda-user] SAB processing patches
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From: "Glenn (glimrick AT epilitimus DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
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Date: Wed, 9 Dec 2020 17:01:37 -0800
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Precedence: bulk

Okay so I think I now understand the direction you are coming at this
from. However, I think there are use cases you are not taking into
account. For instance perhaps I need to use a verilog simulator instead
of spice. Or maybe I am using a proprietary simulator that only uses
some non-spice netlist.

I also disagree that the component should not be in the schematic. Some
users may be like me and prefer to see it. Others may be like you and
prefer not to.

Certainly if we are working on a circuit that has optional real world
sections we want to see those as part of the schematic but still be able
to mix and match them in both the simulation and non simulation contexts.

I am not advocating getting rid of anything that geda-gaf currently
offers. I think SAB adds to it, just like spice-noqsi does. Both provide
the user with tools, and in both cases the tools are completely optional
and up to the user to employ or not as they see fit.

Glenn

John Doty wrote:
>
>
>> On Dec 9, 2020, at 2:10 PM, Glenn (glimrick AT epilitimus DOT com
>> <mailto:glimrick AT epilitimus DOT com>) [via geda-user AT delorie DOT com
>> <mailto:geda-user AT delorie DOT com>] <geda-user AT delorie DOT com
>> <mailto:geda-user AT delorie DOT com>> wrote:
>>
>> How do I markup R2 using spice-noqsi so it goes away when I do
>
> You don’t. It doesn’t belong in the schematic. It’s part of a
> simulation model. You put it in the model. Here’s one way to do it.
> Assume R2 is part of the interface to R3. Then, the following
> schematic gives it the name “R3interface” and wires it in for
> simulation only.
>
> v 20200319 2
> C 40000 40000 0 0 0 title-B.sym
> C 45600 46000 1 0 0 resistor-1.sym
> {
> T 45900 46400 5 10 0 0 0 0 1
> device=RESISTOR
> T 45800 46300 5 10 1 1 0 0 1
> refdes=R1
> T 45900 45800 5 10 1 1 0 0 1
> value=20k
> }
> C 48500 46000 1 0 0 resistor-1.sym
> {
> T 48800 46400 5 10 0 0 0 0 1
> device=RESISTOR
> T 48700 46300 5 10 1 1 0 0 1
> refdes=R3
> T 48400 45400 5 10 1 1 0 0 2
> spice-prototype=R?interface #1 R?internal_node1 1k
> R? R?internal_node1 #2 value@
> T 49200 46300 5 10 1 1 0 0 1
> value=10k
> }
> N 46500 46100 48500 46100 4
>
> Or, you can draw a .SUBCKT model and reference that in the prototype.
> Anything you put in spice-prototype has no effect on anything but
> simulation.
>
> John Doty              Noqsi Aerospace, Ltd.
>
> jpd AT noqsi DOT com <mailto:jpd AT noqsi DOT com>
>
>
>
>