X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com X-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to; bh=rqmolw0lgeLsZq3xeppoVtz8z/apGajmSRXx5g2Z3CE=; b=HS+xzBQuiyQqFY1HywNoEgZTgzxEzaIgKfAuihsxFZkoccCmmTVP0i0rKdKFI54Kll IvPopf/nlXjnB75AFbd+UFyaWIF/GPvttXHLZXl6E3Te7tOco/Rmo7IPLuRKDE4gS8ca eqbnB62ze8zOvUIj0A5aEg978I/1pbAU9tmstOXK9W0J3kR7Ic43OkLA5uMuqDt2ltYT TS085edAqlppqyudtWnt6n5NslpJ4QMGFlFC8TjwNt+2jgG7Hapoi9KF27BKA2ZG+gsQ FOwJg1VtKx6AjfIF/EuMb93sEReTsTI1kH2NOvxDW4+a5Uqf2y2lOe/FiCjRQvrA5HZc Vl2A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to; bh=rqmolw0lgeLsZq3xeppoVtz8z/apGajmSRXx5g2Z3CE=; b=Edk4xvGCI+oxob2H/rjs88V1Et3qD0cYIzqXANsANmUO0odg5Dz9m3HlKF5yj1pnT1 RibEdmb4jVEVFZZv9qPNd/qR74mXZgAnhqnjP5TMcj3ZhUqE5iiBMhXJLEBXyG8IXVQJ ZaUMFR3AqNpBe/BbV97O5HaKxflkFmQDA8N82/uObG0UBQhIIubxxN3bHzPQG1o/btmw pBUXqO6aZIBfwNwZFSm00dQGtuoL4jbzT1hONzB763/nrUU+CXX39h3UkqafrE3m8Jtg 8dAUs927OGhhPn9qLwyZatR617LkEh7hh8OW1DpwPH12ruj2TLsUZNaLovzsKjQ4lt1D nGLw== X-Gm-Message-State: APjAAAU+jxJgBTalMa7iVzqs8yXX617RqOrScF+Dmk6teitp3Q956PCc c2YVja0XKlb/on0ByJs7JSeCkPii2PVhk0uvQkARqg== X-Google-Smtp-Source: APXvYqzI8OiPhdyN/WLCW5yfl1RL5yCVIO00kHnmQ5vwQBm8GQR8QiOL2GE4Gyo2a/fcnyjtom2D8Bk3NdbMsb0BYPI= X-Received: by 2002:a05:6102:7d8:: with SMTP id y24mr7232492vsg.78.1578944459168; Mon, 13 Jan 2020 11:40:59 -0800 (PST) MIME-Version: 1.0 References: <3721c0b4-2805-2d9f-eba0-119c9c2dd81e AT linetec DOT nl> In-Reply-To: <3721c0b4-2805-2d9f-eba0-119c9c2dd81e@linetec.nl> From: "Chad Parker (parker DOT charles AT gmail DOT com) [via geda-user AT delorie DOT com]" Date: Mon, 13 Jan 2020 14:40:47 -0500 Message-ID: Subject: Re: [geda-user] Pcb: Automatic clearance between polygons? To: geda-user AT delorie DOT com Content-Type: multipart/alternative; boundary="0000000000009be043059c0aa7b9" Reply-To: geda-user AT delorie DOT com --0000000000009be043059c0aa7b9 Content-Type: text/plain; charset="UTF-8" Hi Richard- What's wrong with wide traces? The end caps? What about using a large element pad for your connections instead of a polygon? I'll have to look and see if there any facility for polygon-polygon clearance. I've only delved into polygons a couple times, but I have a vague recollection of something. Thanks, --Chad On Mon, Jan 13, 2020, 10:46 Richard Rasker (rasker AT linetec DOT nl) [via geda-user AT delorie DOT com] wrote: > Perhaps a stupid pcb question that probably has been answered a long > time ago already, but I still wondered: Is there a way to get clearance > around a polygon where it overlaps with another polygon on the same > layer? I want to make a dozen identical high-current connections using > as much copper surface as available, and polygons are much better suited > for this than thick traces. But I also want to fill remaining space with > a ground-connected polygon, of course without overlapping (and thus > shorting) the smaller polygons. > > Is there a flag to make a polygon behave like a pad/pin or trace in this > respect, so that another polygon automatically maintains a clearance gap > around the 'flagged' one? Or is manually carving out the circumference > of the smaller polygons (e.g. using the Polygon Hole function) still the > only option? Because this latter can be a bit tedious -- and it would of > course be nice if there's a simple way to do this that I failed to find > so far. > > Thanks in advance, > > Richard Rasker > > --0000000000009be043059c0aa7b9 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi Richard-

= What's wrong with wide traces? The end caps?
What about using a large element pad for your conn= ections instead of a polygon?

I'll have to look and see if there any facility for polygon-polyg= on clearance. I've only delved into polygons a couple times, but I have= a vague recollection of something.

Thanks,
--Chad

On Mon, Jan 13, 2020= , 10:46 Richard Rasker (rasker AT linetec DOT nl) [via geda-user AT delorie DOT com= ] <geda-user AT delorie DOT com> wrote:
Perhaps a stupid pcb question that probably has been answere= d a long
time ago already, but I still wondered: Is there a way to get clearance around a polygon where it overlaps with another polygon on the same
layer? I want to make a dozen identical high-current connections using
as much copper surface as available, and polygons are much better suited for this than thick traces. But I also want to fill remaining space with a ground-connected polygon, of course without overlapping (and thus
shorting) the smaller polygons.

Is there a flag to make a polygon behave like a pad/pin or trace in this respect, so that another polygon automatically maintains a clearance gap around the 'flagged' one? Or is manually carving out the circumfere= nce
of the smaller polygons (e.g. using the Polygon Hole function) still the only option? Because this latter can be a bit tedious -- and it would of course be nice if there's a simple way to do this that I failed to find=
so far.

Thanks in advance,

Richard Rasker

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