X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com Message-ID: <20120405012031.13773.qmail@stuge.se> Date: Thu, 5 Apr 2012 03:20:31 +0200 From: Peter Stuge To: geda-user AT delorie DOT com Subject: Re: [geda-user] Re: [coreboot] Dual SPI Flash adapter Mail-Followup-To: geda-user AT delorie DOT com References: <20120306183339 DOT 713 DOT qmail AT stuge DOT se> <4F577EBB DOT 7000305 AT schinagl DOT nl> <4F68F9C2 DOT 207 AT schinagl DOT nl> <20120321034205 DOT 26453 DOT qmail AT stuge DOT se> <4F6A7930 DOT 7000603 AT schinagl DOT nl> <4F6B757A DOT 6030905 AT schinagl DOT nl> <20120326225412 DOT 3fef55d0010e22c54bebcb79 AT gmail DOT com> <4F70E98B DOT 1080406 AT schinagl DOT nl> <4F7CD599 DOT 6080301 AT schinagl DOT nl> <20120404163815 DOT 197ce59d AT svelte> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20120404163815.197ce59d@svelte> Reply-To: geda-user AT delorie DOT com Errors-To: nobody AT delorie DOT com X-Mailing-List: geda-user AT delorie DOT com X-Unsubscribes-To: listserv AT delorie DOT com Precedence: bulk Colin D Bennett wrote: > Do existing motherboards include a _single_ SPI flash IC already? Yes. Sometimes soldered down, sometimes in a socket. The PCB is to go into the socket, with the original chip on the PCB, and a second SO8 flash chip selectable with a jumper, instead of the original. > What is stored on the SPI flash, A BIOS or coreboot. > and who reads data from it? The CPU reset vector decodes into the end of the flash minus 16 bytes, so this is where the machine starts executing code. > Is your module designed to mount on a stock motherboard and > transparently emulate a single SPI flash IC, or does it use a > modified interface (presumably requiring the party accessing > it to be modified? It's a mux on the CS/ line of two SPI flash chips. //Peter