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Date: Mon, 7 Nov 2011 17:08:09 -0700
Message-ID: <CAN0Jx-8E4HPSs9gABvBpGMyS5EMyA2e1RePZL0nFADPnpa=4mg@mail.gmail.com>
Subject: Re: [geda-user] PCIe card?
From: Russell Dill <Russ DOT Dill AT asu DOT edu>
To: geda-user AT delorie DOT com
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> On 11/07/2011 03:04 PM, Russell Dill wrote:
>> Just be sure they have equal lengths impedances.
>
> How do you "calculate" that?  Use MEEP?  Make a physical board and test?

Simulation. The first order is to just find out the trace width for a
given impedance. The second is to figure out how much that changes by
vs your distance to an active or passive aggressor. If one trace
passes over a void, but another does not, your have an impedance
mismatch. If one trace is close to another trace or plane
(horizontally), but the other does not, you have an impedance
mismatch. Etc.

If you have a lot of clear board space, running a differential pair as
a pair of widely spaced single ended traces has it's advantages. With
closely spaced differential pairs, a small change in any parameter can
have a large effect on impedance. With widely spaced pairs, you are
more immune. And bonus, for a 100 ohm differential pair, you just use
two 50 ohm traces. In many cases, there is a premium on board space so
differential pairs get run tightly coupled.

>
> On 11/07/2011 03:32 PM, Russell Dill wrote:
>> As long as you have them far enough apart, it doesn't matter if the
>> spacing changes.
>
> But, the nicely made line pairs I've seen on motherboards are just one line
> width apart,
> so that does not sound like a good "approximation", but rather a
> mistake...to let
> a diagonal change the spacing by 20%.

If the spacing is 4 or 5 mils, a change of 20% will have a very large
effect on impedance. If the spacing is 20 mils, a 20% change will have
a very tiny effect on the impedance.

> On 11/07/2011 04:46 PM, Russell Dill wrote:
>> every pin is 2 90 bends.
>
> That's a good point.  How many can you stand in a 5GB/s pair?

The same way the number of vias that can be stood is calculated.