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Mail Archives: geda-user/2019/01/04/16:26:02

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Fri, 04 Jan 2019 13:24:23 -0800 (PST)
Date: Fri, 4 Jan 2019 22:24:19 +0100
From: "Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
To: geda-user AT delorie DOT com
Subject: Re: [geda-user] [tEDAx] drc block: spec and ref implementation
finished
Message-Id: <20190104222419.6451d73747ee998be30daed4@gmail.com>
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The possibility to save design rule to save/load design rule to file is really handy and as far as I could tell this seems very good to check for manufacturing limitations.

For hight voltage extra space is usually need in form of clearance and creapage distances between some nets. It is also common nets with higher current need rule for mininum width. Radio frequency often have requirement for both "clearance" and net width. These are however not manufacturing limitations.


> Hi all,
> 
> tEDAx is the Trivial EDA eXchange format. Like 1000 other similar file 
> formats, it is designed to allow different EDA tools to exchange data. 
> Unlike most other formats, the main objective of the tEDAx format is to be 
> cheap to implement. It also has a free specification under a very 
> permissive license. 
> 
> I've just finished tEDAx drc block support in pcb-rnd, both load and save, 
> so we have an implementation anyone can use for testing.
> 
> tEDAx specification: http://repo.hu/projects/tedax/
> 
> tEDAx drc block spec: http://repo.hu/projects/tedax/drc.html
> 
> If you maintain software that is dealing with printed circuit board 
> geometry in any way, please consider implementing support for the tEDAx 
> drc block.
> 
> Best regards,
> 
> Igor2

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