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	Wed, 12 Jul 2017 13:09:42 -0700 (PDT)
Date:	Wed, 12 Jul 2017 22:09:39 +0200
From:	"Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
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Subject:	Re: [geda-user] PCB, load element bug (know then but not why)
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> > You have or are planning a tree like structure like this: root object layout --> sub circuits --> footprints --> pads --> drawing primitives?
> >
> > In sort of any object could appear anywhere? To connect with netlist it must be possible to find footprints by refdes and pin number but otherwise what is counted as a pad os circuit is more about where they are saved?
> 
> What I already have:
> 
> board -> primitives
> 
> board -> subcircuit -> primitives
> 
> What I plan to have:
> 
> board -> subcircuit -> subcircuit -> ... -> primitives

At this point you only have to add a mechanism to tell which subcircuit is a footprint or pad. Then of course they need to be stored somewhere in a structured way.

> This also means a hierarchic pcb could reflect a hierarchic netlist which 
> in turn could be derived from a hierarchic schematics (low prio, long 
> term plan).
> 
> Pins & pads: I will implement what I've developed for tEDAx: there won't 
> be a special pin or pad object any more, but there will be logical 
> terminals. A terminal will have an ID, similar to pin or pad number now, 
> and other, optional metadata (such as symbolic name). You would just tag 
> any primitive within a subcircuit to belong to a specific terminal ID. 
> Or in other words, your "pin 1" could constructed of a via, your "pad 2" 
> could be a line, a polygon or even an arc, and your "pad 4" can be a 
> combination of any of the above.

Termal pads with irregular shapes are common. I do understand the details, you tag some object within sub circuit to tell they are a terminal but the actual sub circuit is a pin or pad?

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