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	Wed, 12 Jul 2017 11:13:43 -0700 (PDT)
Date:	Wed, 12 Jul 2017 20:13:39 +0200
From:	"Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
To:	geda-user AT delorie DOT com
Subject:	Re: [geda-user] PCB, load element bug (know then but not why)
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> > Attached. I used save buffer elemnts to file. Neither load layout or element to buffer worked. Adding a via at the first line and it could be loaded with load element to buffer but not load layout to buffer.
> >
> > I happened to have an old file that worked and then checking content of this in editor I found vias in the beginning of file and was very suprised then file could be loaded then one of these where added at the first line.
> >
> > I am pretty sure I used it before without problems before but can't remember the details. Could it be wrong parser is selected somewhere? File ending *.pcb
> 
> Thank you.
> 
> The problem is unfortunatley more complex.
> 
> The .fp format is a single Element[] or Element() block in a file. The 
> .pcb format is a set of different objects, possibly Elements too, and some 
> headers (like PCB[]).
> 
> A .pcb file will contain layer infromation too, an .fp file won't.
> 
> The file you attached is neither of the above:
> 
> - it contains two elements, so that it can't be a footprint file
> 
> - it also contains (some) layer info, so it can't be a footprint file
> 
> - but it does not contain the necessary headers to make it a valid .pcb 
> file
> 
> 
> It is a known bug in pcb-rnd, probably also in mainline: if you save a 
> buffer with more than 1 elements, it will be hard or impossible to load it 
> again. Saving only 1 element as buffer and you will be able to load it.

I saved with more than one element so this is the problem. Now I also know it could be worked around at least sometimes by adding a via on the first line. Second option is by paste cut out and save in a different file as layout. I tried and it exist in both mainline and pcb-rnd.

> I don't plan to fix this in pcb-rnd, as elements will be removed soon. I 
> will make saving the buffer as buffer and saving a single subcircuit as a 
> footprint more explicit on the UI.

Sounds good.

You have or are planning a tree like structure like this: root object layout --> sub circuits --> footprints --> pads --> drawing primitives?

In sort of any object could appear anywhere? To connect with netlist it must be possible to find footprints by refdes and pin number but otherwise what is counted as a pad os circuit is more about where they are saved?

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