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Date:	Thu, 16 Jul 2015 17:23:47 -0400
Message-Id:	<201507162123.t6GLNlqR029844@envy.delorie.com>
From:	DJ Delorie <dj AT delorie DOT com>
To:	geda-user AT delorie DOT com
In-reply-to:	<8F26D2B2-3724-4264-B8A4-933E9377306D@noqsi.com> (message from
	John Doty on Thu, 16 Jul 2015 15:15:47 -0600)
Subject:	Re: [geda-user] Net attributes
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> Nope. I sometimes have to make multiple copies of a subcircuit
> schematic: same topology but different components. Having more
> control over hierarchy expansion in gnetlist would be good.

I was thinking about the m4 problem in pcb and thought "I wonder if we
could put a generic expression parser in where we expect simple
values".  I don't think it would help much for pcb (without a looping
construct, at least), but it might help for heirarchical schematics if
a component could have a value that was an expression referencing
inherited attributes from the parent.  The schematic flattener (if
you're flattening it for netlisting, for example) would expand the
expression.

Part of me says "put a guile expression there" but that opens up the
problem of having a schematic with executable code in it.  Given the
nature of electronics, a mathematical (TeX? Mathematica?) expression
would be more natural, but bring its own can of worms...

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