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Mail Archives: geda-user/2013/03/05/14:06:10

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Tue, 05 Mar 2013 11:05:38 -0800 (PST)
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References: <51350C42 DOT 2070801 AT estechnical DOT co DOT uk>
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Date: Tue, 5 Mar 2013 11:05:38 -0800
Message-ID: <CAN0Jx-9OZ5x3Pf_M+_M+7XhHAeKBbG8xcbtp+BYVkB=MeZA3Ag@mail.gmail.com>
Subject: Re: [geda-user] Stencil tooling holes
From: Russell Dill <Russ DOT Dill AT asu DOT edu>
To: geda-user AT delorie DOT com
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Oh, one more thing, if you have lone openings in you paste stencil,
they can be mistaken for paste on a fiducial, which some board houses
will remove through an automatic or manual process (not sure which).
Be sure to specify when ordering a stencil to please not mess with my
stencil.

On Tue, Mar 5, 2013 at 9:05 AM, Russell Dill <Russ DOT Dill AT asu DOT edu> wrote:
> On Mon, Mar 4, 2013 at 1:04 PM, Ed Simmons <ed AT estechnical DOT co DOT uk> wrote:
>> Hi all,
>>
>> Please could someone offer some advice for placing tooling holes into my
>> design (these are off the edges of the board itself and will only be used
>> for stencil layers)
>>
>> How would you go about this? Is this something I should make a custom
>> footprint for?
>>
>> Thanks in advance - best regards,
>> Ed
>
> I have a couple of patches that makes it really easy to draw on any
> layer. In the case of tooling holes for a stencil, I place an unplated
> drill, in the tooling hole location, and then add a zero length trace
> of the appropriate size in the same location. I also use this to make
> arbitrary soldermask windows and adding text to the fab drawing
> "Exposed copper OK", "1.40mm 20 degree bevel", etc. I could be used
> for bridging 0 ohm resistor footprints as well.
>
> Layer(10 "toppaste")
> (
>         Attribute("PCB::skip-drc" "1")
>         Attribute("PCB::skip-print" "1")
>         Attribute("PCB::merge" "toppaste")
> [snip]
> )

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