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Date:	Sun, 03 Mar 2013 23:44:55 -0500
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Subject:	Re: [geda-user] Unterminated logic signals
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On 03/03/2013 10:14 PM, Patrick Doyle wrote:
> Hello Experts!
> I have a question for you...
>
> I have a PCB I purchased from a vendor that has a 15 pin connector on
> it, of which only 8 pins have defined functions. (The functions of the
> other 7 pins are undefined by the manufacturer of the board and may or
> may not be connected to logic on their board. I have asked to what
> those pins are connected, but haven't heard anything back yet). Of the
> 8 pins with defined functions, I use only 7. I have a cable drawing
> that specifies which 7 pins should be connected at each end of the cable.
>
> The problem is, our manufacturing guys built (or allowed a 3rd party
> to build) cables with all 15 pins in the connector populated. At the
> other end, they just cut the unused 8 wires and populated the
> connector with the 7 signals I use.
>
> I am trying to decide whether I need to tell our manufacturing guys to
> rework the cables or not. How much do you think it matters that there
> might be digital logic on the PCB driving signals down those unused
> wires in my cable? The cable itself is shielded, but I wonder what
> sort of cross talk the unterminated signals might cause. (I also worry
> a little bit about the clipped ends shorting together, but for the
> purpose of this question, I'm going to assume (ha ha) that they
> insulated each end after they clipped it).
>
> What do you folks think?
>
> --wpd
>
Are the signals left unconnected inputs our outputs? If they are inputs,
you probably do not want to leave them floating (in the past, older
technologies like TTL and ECL let you get away with floating inputs). If
you are worried about crosstalk caused by the unterminated lines,
shouldn't you also be concerned about the crosstalk of the lines in use?

In general, keep in mind that when digital signals are involved, it is
not the clock frequency that matters but the **edge rates*** (In an RF
circuit, you usually have a carrier and sidebands around, but close to
it, so specifying the frequency of the carrier is enough; there is no
such thing in logic design and the sharper—faster rising—logic edges
are, the higher their frequency content.) If a logic pulse takes only a
small fraction ("small" usually meaning "less than 10%" by rule of
thumb) of its rise/fall time to reach its destination, you can treat the
connection as lumped; otherwise, you have to examine the propagation of
that pulse with transmission line theory, perhaps taking dispersion into
account.. You may have one pulse per day, but if its rise/fall time is
very short, you can ruin it if you do not pay proper attention to how it
propagates.

The voltage of the wave incident on an open termination ideally doubles
upon reflection, so the reflected wave has double the voltage of the
incident one (in reality, there is no ideal open circuit and there will
be losses, so this will be approximately true) as it begins to travel
back towards the source.

Howard Johnson's book on fast digital design can be very useful in this
respect, even if you have RF/microwave background.

cf

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