Mail Archives: geda-user/2012/04/28/19:55:47
On 04/28/2012 01:41 PM, Russell Dill wrote:
> They are nice because you don't have to file them off, but
> panelization services can't use them since the require a set back.
I wonder what the dorkbotpdx guy would do if I asked him,
"What's the aspect ratio of the area left to fill on the current run
of medium production? If you tell me, I can generate a RS-274X blob
that size that hangs together as a panel, and what price would
you sell it to me for?
Maybe he'd go less than $1/inch for that.
PCB is a good panelizer.
seeed has so many restrictions on their $0.26/inch 2 layers
that I can't see using them for product. Oh, there are some
customers that would not care about rough edges...
The part about break-off forces means all the perimeter
has to be designed with a keep away distance to avoid stress
to soldered components and that's a waste also...which
is another reason to skip using any randomly placed break-off tabs.
Teeny boards are a good value and they are best fabbed/assembled in groups,
so I'd only design my own routed edges with tabs.
That series of articles by Hausherr is good. I heard him talk at a
board layout tool-sales/fab-sales meeting last year and he's
pretty good at describing the state of things with a US perspective.
I wonder if that is even close to the Asian perspective though.
Mostly he was harping on metric metric and PCB's there as of a year ago,
so the only thing to do to get up with the mainstream is to learn some way
to auto-generate IPC "compatible", yet not copied directly, land patterns in
thin, normal, and fat proportions, since the state of the industry is to
"wing it" at fab time according to the fab's needs, and shrink or bloat things
to match capabilities.
John
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