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Mail Archives: geda-user/2012/04/26/19:22:06

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To: geda-user AT delorie DOT com
From: Kai-Martin Knaak <kmk AT familieknaak DOT de>
Subject: [geda-user] Re: Dual SPI Flash adapter attempt 2.0
Date: Fri, 27 Apr 2012 01:20:51 +0200
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Cc: coreboot AT coreboot DOT org
Reply-To: geda-user AT delorie DOT com

Oliver Schinagl wrote:

> Somehow I managed to mirror one of my labels on a component. So the
> part was on the top side, while the label looked like it was on the
> bottom side. Long story short, i just deleted the part, and copied it
> from the neighboring part. Due to all the renaming though, I get all
> strange connects when using the automated rats nest, but I guess
> that's the price to pay.

I prefer to drive my layout with gschem. That is, all parts in the
layout are also mentiond in the schematic - no manual insertion of 
footprints in pcb. For a multiple instances like in your layout can
be achieved with a hierarchical schematic.


> So the big question is; shall I send this to seeed for fabrication

The outline lines should look more simple. The gerbers expicitely 
call for a milled edge at the middle of each line. So ther should 
be a single line where you expect the fab to cut the board.

The fabs I know, would object against such a multiple part layout
and charge extra for their increased handling effort. They prefer 
layouts in one piece.

Copper lines look a bit on the skinny side. If they are more beefy
the manufactured board can be tweaked more easily. Depending on 
the currents, ground and supply may benefit from increased line 
thickness. If S1 and S2 are SMD supposed to be jumpers, then it 
may be hard to close them with a solder iron. The pads should be
much wider than the gab to make the solder bridge more likely. 		 

---<)kaimartin(>---
-- 
Kai-Martin Knaak, Email: kmk AT familieknaak DOT de
http://pool.sks-keyservers.net:11371/pks/lookup?search=0x6C0B9F53
Still unhappy with moderation of geda-user. 
Why? Because it is completely intransparent.

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