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Date:	Fri, 18 Nov 2011 09:16:39 -0500
Message-ID:	<CANtXPph-UN616B_-fpeN0Z13WnoYBV-43Ykaf1q3zrsZmDXhkA@mail.gmail.com>
Subject:	Re: [geda-user] Modern GAL/PAL design with gEDA?
From:	Charles Lepple <clepple AT gmail DOT com>
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On Fri, Nov 18, 2011 at 12:47 AM,  <asomers AT gmail DOT com> wrote:
> Unlike FPGAs, a GAL22V10 requires no special  secrets to program.  An
> FAE once showed me how to decode the JEDEC file using publicly
> available information.  So theoretically someone _could_ write an open
> source compiler for it - but no one has.

Steve Williams (author of Icarus Verilog) started to put together some
tools for working with PAL chips:

   http://www.icarus.com/eda/ipal/

While I don't think the code currently does the logic reduction
necessary to compile a new design, there are a number of description
files which translate between the fuse bit numbers and the logical
functions. For a 22V10, see pa/pal22v10.pa for functional descriptions
of the macrocells, and some of the other files (with "dip" or "plcc"
in the name) for mappings to pin numbers.

-- 
- Charles Lepple

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