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Date:	Mon, 07 Nov 2011 17:55:09 -0600
From:	John Griessen <john AT ecosensory DOT com>
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Subject:	Re: [geda-user] PCIe card?
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On 11/07/2011 01:04 PM, Peter Clifton wrote:
> code support for differential traces in PCB

We see that as normal in motherboard layouts for computers since 2005 at least...
And there seems to be some kind of autofill routine used for adding length to traces
at min width with lots of wiggles to make the arrival times line up.

I'll send some tip money for that when you promise to do it.
A la Kickstarter...

On 11/07/2011 02:55 PM, Stephen Ecob wrote:
 > lay out and edit a PCB with
 > the differential pairs replaced by fat single traces of thickness (2 *
 > differential trace copper thickness + differential trace internal
 > spacing).

A very good start on the problem.  maybe not enough to get a contract
for "latest, greatest", but applicable to lots of open hardware wants.

On 11/07/2011 03:00 PM, Russell Dill wrote:
 > integrated PCIe support
 > and very detailed recommendations for PCB layout.

Sounds like a done deal...

On 11/07/2011 03:04 PM, Russell Dill wrote:
 > Just be sure they have equal lengths impedances.

How do you "calculate" that?  Use MEEP?  Make a physical board and test?

On 11/07/2011 03:23 PM, Stephen Ecob wrote:
 > The main limitation is that the spacing between the traces changes
 > slightly for diagonal lines, changing the impedance.
 > For high speeds I'd also want to eliminate sharp corners and use arcs
 > for every change in direction.  Creating pairs of arcs that maintain
 > even spacing would be tedious using PCB's present UI.  Creating single
 > thick arcs in the GUI and later having them transformed into correctly
 > spaced pairs of arcs would be bearable.

Ya, ya!  The impedance changes are no good as you get faster and faster...
So, post processing the fat lines to become transmission lines is a good tactic.

n 11/07/2011 03:32 PM, Russell Dill wrote:
 > As long as you have them far enough apart, it doesn't matter if the
 > spacing changes.

But, the nicely made line pairs I've seen on motherboards are just one line width apart,
so that does not sound like a good "approximation", but rather a mistake...to let
a diagonal change the spacing by 20%.

On 11/07/2011 04:46 PM, Russell Dill wrote:
 > every pin is 2 90 bends.

That's a good point.  How many can you stand in a 5GB/s pair?

John

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