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Subject: Re: [geda-help] Wire bridges in gschem?
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Date: Fri, 23 Mar 2018 10:26:12 -0400
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On 2018-03-23 09:00 AM, HansFong wrote:
> Hello all, newbie gEda user here (also newbie in PCB-design).
>
> In PCB you can draw arbitrary lines and vias, which is handy if you 
> want to insert a single test pin (a physical pin you put on your PCB 
> to hook up a probe) in a line, or make a wire bridge (two vias with 
> nothing in between and an arbitrary distance in between them). 

Careful --- a via will not work if you're getting the PCB
done with solder mask  (the solder mask covers vias).

In PCB, you can get around this by just selecting the
via and going to the menu Select --> Convert selection
to element.  (I suspect that this is not what you want;
I just thought I'd mention it)

> So what is the proper way to make such things in gschem?
>
> 1) use connectors?

The test-1 symbol already suggested is good at the
schematic level, but unfortunately it does not have an
associated footprint --- you could use JUMPER1; however,
there doesn't seem to be one that does not place a
hole.  I created my own, I called it Pad --- e.g., copy-n-paste
the following into a file called Pad.fp in your footprints
directory (e.g., $HOME/.gEDA/footprints):

---- BEGIN Pad.fp FILE ----

Element["" "" "" "" 78500 17000 0 0 0 100 ""]
(
     Pad[0 0 0 0 2mm 16mil 2.11mm "" "1" "edge2"]
)
---- END Pad.fp FILE ----

You can adjust the size --- 2mm is the diameter; 16mil
is the clearance; 2.11mm is the diameter of the solder
mask hole;  you can create multiple versions if you
need to, for different sizes.

> 2) use 0 ohm resistors?
>
> 3) ???

Already suggested, but I second that idea, which I've
found myself using recently:  you can place vias and
route a trace in a different layer (e.g., spare;  or even
ground or signal2/3 if you're designing a two-layer
board and are not using those extra layers).  Then,
when sending off the Gerber files, just exclude the
file for that extra layer.  The trick is:  PCB will know
that the connection is made and will not report that
there are missing rats.

However, one detail --- see my comment above about
the vias being covered by the solder mask;  if you use
this trick, make sure to select the vias and convert
them to elements!

Cheers,
Carlos
--


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