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Mail Archives: geda-help/2016/08/24/10:23:53

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From: "Evan Foss (evanfoss AT gmail DOT com) [via geda-help AT delorie DOT com]" <geda-help AT delorie DOT com>
Date: Wed, 24 Aug 2016 14:23:22 +0000
Message-ID: <CAM2RGhRNs3Vw5rW2NTo_0ycgSatXiMGCjLKL1eWtYpnfg0enMw@mail.gmail.com>
Subject: Re: [geda-help] pcb: blind via
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On Wed, Aug 24, 2016 at 12:26 PM, Milan Prochac (milan AT prochac DOT sk)
[via geda-help AT delorie DOT com] <geda-help AT delorie DOT com> wrote:
>
> Status update, to keep the topic warm:
>
> * visual presentation:
>   - blind/buried vias have 2 half-circles drawn on top; colors indicate
> starting and ending layer of blind/buried via
> (https://static.bastl.sk/pcb/bvias_01.png)
>   - if all layers penetrated by blind/buried via are turned off the via is
> thin-drawn (https://static.bastl.sk/pcb/bvias_02.png)
>
> * action to set blind/buried vias was modified to allow set only one end and
> use currently active layer; such actions can be bound to menu items and
> hot-keys (done for GTK HID) - https://static.bastl.sk/pcb/bvias_03.png and
> https://static.bastl.sk/pcb/bvias_04.png. These actions together with
> visualisation and immediate on-screen changes seems to be sufficient user
> interface, so no GUI dialog will be implemented.
>
> * Ratnest optimization and short detection was modified to take blind/buried
> into account
>
> * Layer management is partially done - adding and removing layer works fine,
> moving layer is not completely finished/tested.
>
> * When layer is changed during line draw, the automatically created vias can
> be blind/buried; the same applies for line move from one layer to another.
> This behavior is controlled by option
> (https://static.bastl.sk/pcb/bvias_06.png). On following pictures the
> identical operation was first performed with option switched off (upper
> track) and with option switched on; line draw:
> https://static.bastl.sk/pcb/bvias_04.png and line move:
> https://static.bastl.sk/pcb/bvias_05.png. The via creation logic was not
> changed, only via type is affected.
>
> * export hid was adjusted to create additional drill layers for layer pairs
> connected by blind/buried vias. The default drill layer is used for
> through-hole pins and vias - if no blind/buried vias are used, there is no
> change in generated output.
>   - no changes in exporter API; backward compatibility with external
> exporters is retained
>   - PS and Gerber exporters were modified to accept additional layers - the
> only change was the filename creation (plus font size and line spacing on
> TOC page of PS export); for gerber the alternate naming schemes need to be
> adjusted.
>   - remaining standard exporters need to be reviewed, but at first look they
> do not need any change; the OpenSCAD exporter will be adjusted later.
>
> There are still some minor issues - for example freedom in layer grouping:
> if layer group does not contain contiguous layers, the behavior is confusing
> (but correct) in some situations. I need to decide the level of warnings
> about this situation or enforcing the contiguous layer groups.
>
> Another one are degraded vias (single layer vias). Vias with both ends on
> the same layer can be avoided (and automatically deleted after layer removal
> for example), but vias with both ends on same layer group cannot be avoided
> easily. Behavior is correct, just unnecessary copper ring with no associated
> drill is created on respective layer group.  Maybe these degraded vias
> should be detected as part of DRC.
>
> The special topic is the output used for PCB fabrication. Currently the
> drill pairs are automatically generated. Maybe  some kind of drill pair
> configuration and checks if design fits these pairs should be implemented. I
> have very little experience with commercial packages (and no time to learn
> them), so some feedback or ideas are welcome.

I like your ideas. I feel like we should have an easier way to make
vias though. Going to a drop down to select via and then what type is
more clicks. i think a separate button for non-through board via would
be a better option.

> Milan
>
>
>
>
> On 8/3/2016 3:31 AM, Milan Prochac (milan AT prochac DOT sk) [via
> geda-help AT delorie DOT com] wrote:
>>
>>
>> Update:
>>
>> Already implemented:
>>   1. internal representation. Single connection per via is implemented.
>> Via stacking will be enabled later.
>>   2. file format with backward compatibility (if no blind/buried vias are
>> used); bugs fixed
>>   3. new action SetViaLayers implemented. Select action extended by
>> BuriedVias parameter. See generated pcb.pdf for more details
>>       3a. Undo was extended to cover new operations
>>   4. object report (Ctrl-R) contains information about blind/buried vias
>>   5. Drawing code updated:
>>       5a. on GUI HID (screen) vias themselves are drawn unchanged. Any
>> recommendation how to visually distinguish blind/buriad vias from
>> through-hole vias are welcome.
>>       5b. on GUI HID (screen) clerarances and thermals are cut-out only on
>> respective layers
>>       5c. on non-GUI HID exporters both vias and clearances/thermals are
>> drawn on respective layers only
>>   6. exporters which use standard drawing interface displays correct data
>> (tested on PostScript and gerber). Drill information will require serious
>> reworking - single plated and unplated drill is not sufficient;
>>
>> What will come next
>>   7. ERC check (optimize rats) to evaluate connections only on proper
>> layers
>>   8. maintain layer information after layer operations: new layer, remove
>> layer, move layer
>>   9. maintain layer information after line move to another layer
>> 10. automatically create blind/buried via when changed layer during line
>> drawing; it will be controlled by option.
>> 11. update solder mask drawing
>> 12. GUI dialog to change via type
>>
>> Current code: https://static.bastl.sk/pcb/Burried-vias-step-2.tar.gz .
>> Testers are welcome.
>>
>> Milan
>>
>>
>
>



-- 
Home
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Work
http://forge.abcd.harvard.edu/gf/project/epl_engineering/wiki/

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